Seminar on 'Cadence-VLSI Tools & Design' organized by EEE department

Seminar on 'Cadence-VLSI Tools & Design' organized by EEE department

Publish Date: 
Monday, June 24, 2024
Department: 
Department of Electrical and Electronic Engineering (EEE)

On June 10, the Department of Electrical and Electronic Engineering (EEE), in collaboration with the ULAB Electronics and Robotics Club (UERC) and IEEE RAS ULAB SB Chapter, organized a seminar on 'Cadence-VLSI Tools & Design' presented by sBIT Ltd. 

Special thanks to our resource persons from sBIT Ltd.

Resource Persons: 
- Dr. Jahangir Dewan, President and CEO, sBIT Ltd BD & sBIT Inc USA.
- Nikhitha Balaga, Physical Design Trainee Engineer, sBIT Ltd.
- Sulaiha Tarzia, Technical Marketing Engineer, sBIT Ltd.
- Sumaiya Tarique Labiba, Design Verification Trainee Engineer, sBIT Ltd.
- Abdal Haque Mondol, Senior Design verification Engineer, sBIT Ltd.
- Sudip Sarkar, Principal Application Engineer, Cadence Design Systems

Their presentations on Cadence VLSI tools, Analog-Mixed Signal Design Flow, RTL2GDS Design and Verification Flow, and the development of the semiconductor-VLSI design ecosystem in Bangladesh were enlightening and inspiring.

Thank you to all the attendees for making it a successful and engaging event.